Using the Intel Xeon Phi accelerators

Each of the nodes phi1 and phi2 has four Accelerator, which can be used for numerical intensive computations, similar as a GPU. In contrast to the latter, no special programming paradigm has to be used. C++ codes with openMP and MPI instructions will work in principle on these cards.

Reserving nodes

To use the accelerators, please reserve the nodes via the batch system. They have the property phi, so as an example use the batch file header

#pbs -l walltime=24:00:00,nodes=1:phi:ppn=8

or, for interactive use, run the command:

qsub -I -l walltime=24:00:00,nodes=1:phi:ppn=8

(mind that the first I is a captial i)

Compiling code for the accelerators

Code for Xeon Phis can only be compiled on the nodes phi1 and phi2, so please use a batch session for this purpose.

There are in principle two ways to use the cards. The first is the so-called offload model, where the main program runs on the host CPU and parts of the computation run on the accelerator. This is similar to GPUs. The second is the native mode, where all the code runs on the accelerators.

The following command-line arguments are required to set the operating mode:

• -no-offload: Ignore any offload directives
• -offload-build: Create offload regions according to the directives in the source code.
• -mmic: Build the executable for MIC. Linking is also required to the libiomp5 library in this mode.

A more complete guide can be found here: http://software.intel.com/sites/default/files/article/335818/intel-xeon-phi-coprocessor-quick-start-developers-guide.pdf

Starting computations on the accelerators

To use some new commands required for the usage of the accelerators in your batch files, please add the module "tools/mic".

For running code natively on the accelerators, the command "micnativeloadex" can be used. Get information about it via "micnativeloadex -h" (in an interactive session, see Reserving nodes).

-- HolgerAngenent - 2013-10-30